A Flip-Flop with High Soft-error Tolerance and Small Power and Delay Overheads

A new low power high reliability flip-flop robust against process variations

Low scaling technology makes a significant reduction in dimension and supply voltage, and lead to new challenges about power consumption such as increasing nodes sensitivity over radiation-induced soft errors in VLSI circuits. In this area, different design methods have been proposed to low power flip-flops and various research studies have been done to reach a suitable hardened flip-flops. In ...

High-performance and Low-power Clock Branch Sharing Pseudo-NMOS Level Converting Flip-flop

Multi-Supply voltage design using Cluster Voltage Scaling (CVS) is an effective way to reduce power consumption without performance degradation. One of the major issues in this method is performance and power overheads due to insertion of Level Converting Flip-Flops (LCFF) at the interface from low-supply to high-supply clusters to simultaneously perform latching and level conversion. In this p...

Radiation-Hardened Flip-Flops with Low Delay Overheads Using PMOS Pass-Transistors to Suppress a SET Pulse in a 65 nm FDSOI Process

We propose radiation-hardened flip-flops (FFs) based on the adaptive coupling FF (ACFF) with low dynamic power and short delay overheads in a 65 nm Fully Depleted Silicon On Insulator (FDSOI) process. We designed four FFs composed of the master latch with PMOS pass-transistors to reduce delay time overheads and the slave latch with stacked transistors for high soft-error tolerance. We evaluated...

Dual-Edge Triggered Pulsed Flip-Flop With High Performance And High Soft-Error Tolerance

Performance Analysis of Reversible Sequential Circuits Based on Carbon NanoTube Field Effect Transistors (CNTFETs)

This study presents the importance of reversible logic in designing of high performance and low power consumption digital circuits. In our research, the various forms of sequential reversible circuits such as D, T, SR and JK flip-flops are investigated based on carbon nanotube field-effect transistors. All reversible flip-flops are simulated in two voltages, 0.3 and 0.5 Volt. Our results show t...